RFR: 8317721: RISC-V: Implement CRC32 intrinsic [v2]

[ArsenyBochkarev]

On Wed, 13 Dec 2023 01:04:16 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

>> ArsenyBochkarev has updated the pull request incrementally with three additional commits since the last revision:
>> 
>>  - Use zero_extend instead of shifts where possible
>>  - Use andn instead of notr + andr where possible
>>  - Replace shNadd with one instruction in most cases
>
> src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp line 1642:
> 
>> 1640:   __ xori(crc, crc, -1); // ~crc
>> 1641:   __ slli(crc, crc, 32);
>> 1642:   __ srli(crc, crc, 32);
> 
> Suggestion:
> 
>   __ notr(crc, crc); // ~crc
>   __ zero_extend(crc, crc, 32);

Done

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PR Review Comment: https://git.openjdk.org/jdk/pull/17046#discussion_r1427886119