RFR: 8300247: Harden C1 xchg on AArch64 and PPC [v2]

Thu Jan 26 14:24:19 UTC 2023

On Mon, 23 Jan 2023 09:10:09 GMT, Erik Österlund <eosterlund at openjdk.org> wrote:

>> In the C1 xchg operation, AArch64 and PPC don't deal well with the input register and output register being the same. In some new code, that can happen. This change aims at solving that issue.
>> 
>> As for AArch64, the xchg implementation in the macro assembler already deals well with the input and output register being the same. So we just need to remove an assert. As for the PPC implementation, @TheRealMDoerr has written a variation that uses a temp operand ensuring that they are not the same register.
>
> Erik Österlund has updated the pull request incrementally with one additional commit since the last revision:
> 
>   RISC-V fix

Looks good.

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Marked as reviewed by rcastanedalo (Reviewer).

PR: https://git.openjdk.org/jdk/pull/12065