RFR: 8306667: RISC-V: Fix storeImmN0 matching rule by using zr register

[Xiaolin Zheng]

The `storeImmN0` in the RISC-V backend missed a `CompressedOops::base() == NULL` predication. Under non-zero-based compressed oops mode, the `xheapbase` can be a non-zero value and crashes the VM.

Reproduced by `<JDK>/bin/java -Xcomp -XX:HeapBaseMinAddress=72030M -version` simply. A hs_err file is attached in the JBS issue.

x86 uses `r12` as a zero register in `storeImmN0`, but RISC-V has a zero register so we can use it to implement the matching rule.

Testing in progress.

Thanks,
Xiaolin

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Commit messages:
 - Merge branch 'master' into heapbase-crash
 - Merge branch 'master' into heapbase-crash
 - A simple fix

Changes: https://git.openjdk.org/jdk/pull/13577/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=13577&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8306667
  Stats: 3 lines in 1 file changed: 0 ins; 0 del; 3 mod
  Patch: https://git.openjdk.org/jdk/pull/13577.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/13577/head:pull/13577

PR: https://git.openjdk.org/jdk/pull/13577