RFR: 8319184: RISC-V: improve MD5 intrinsic [v2]
Fei Yang
fyang at openjdk.org
Tue Nov 7 07:42:31 UTC 2023
On Mon, 6 Nov 2023 15:21:19 GMT, Antonios Printezis <tonyp at openjdk.org> wrote:
>> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 3964:
>>
>>> 3962: Register a, Register b, Register c, Register d,
>>> 3963: int k, int s, int t,
>>> 3964: Register rtmp1) {
>>
>> Could you please rename this into `rtmp` so that it will be more consistent in formal parameter naming convention?
>
> I don't think `rtmp` is the right name either. The register holds the result of an expression the callers have calculated. I called it `rtmp1` as it was the same name as the register used in the callers to hold the result. Maybe I can call it `expr`, `partial_expr`, `expr_prefix`, or something similar?
Yeah, a more meaningful name is appreciated here! Maybe simply `value` I guess?
>> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 3984:
>>
>>> 3982: Register a, Register b, Register c, Register d,
>>> 3983: int k, int s, int t,
>>> 3984: Register rtmp1, Register rtmp2) {
>>
>> Now that we have scratch register `t0` available for use in functions md5_FF/GG/HH/II, we could further remove use of `rtmp2`. Then we might want to let `rtmp1` = `t2` while use `x10`-`x11` for `state0`-`state1`. This will help save use of one callee-saved register. Please consider.
>
> It was actually a conscious decision to use different registers (`a0`/`a1`) for the intermediate results in `md5_FF/GG/HH/II` than the registers (`t0` / `t1`) used in `m5_FF_GG_HH_II_epilogue`. Fewer register dependencies between instructions can maybe help some cpus. Also, `rtmp1` / `rtmp2` being `a0` / `a1` allows the use of compressed instructions in a couple of places (if we care about compressed instructions that is!).
OK. That sounds like a good point. Thanks.
-------------
PR Review Comment: https://git.openjdk.org/jdk/pull/16453#discussion_r1384492756
PR Review Comment: https://git.openjdk.org/jdk/pull/16453#discussion_r1384493687
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