RFR: 8328998: Encoding support for Intel APX extended general-purpose registers [v2]

[Steve Dohrmann]

On Tue, 16 Apr 2024 20:39:08 GMT, Vladimir Kozlov <kvn at openjdk.org> wrote:

>> Thanks for the comment.  The "& 0x7" style was suggested to me by @sviswa7 as a efficient way to check for r12, r20, r28 in the assert, and for r13, r21, r29 in the if statement.  I originally was comparing against each new APX register encoding.  The style in the PR is concise but it can be done either way.  What do you think?
>
> Got it - it is for few registers check now. What is common between rsp, r12, r20, r28 registers (except encoding)?
> R12 is used for heap base in compressed oops  and RSP is RSP. What are r20 and r28? Why they can't be used in this addressing mode?
> 
> Please add comments for all lines where you replaced checks for `r*->encoding()` to say for which registers you do a check and why.

The reason registers 12, 20, and 28 are asserted out of that else at line 668 is they are handled earlier in an else around line 646.

`    } else if ((base_enc & 0x7) == 4) {
      // [rsp + disp]
`

I added a comment to this effect and have also added comments in the 3 other places in the function where the replacement was done, indicating the registers involved.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1568077107