RFR: 8328998: Encoding support for Intel APX extended general-purpose registers

[Vladimir Kozlov]

On Tue, 16 Apr 2024 19:55:45 GMT, Steve Dohrmann <duke at openjdk.org> wrote:

>> src/hotspot/cpu/x86/assembler_x86.cpp line 669:
>> 
>>> 667:       // [base + disp]
>>> 668:       assert(((base_enc & 0x7) != 4), "illegal addressing mode");
>>> 669:       if (disp == 0 && no_relocation &&  ((base_enc & 0x7) != 5)) {
>> 
>> We loost information with this change. Can it be done as `is_r13_encoding(base_enc)` and `is_r12_enxoding(base_enc)`?
>
> Thanks for the comment.  The "& 0x7" style was suggested to me by @sviswa7 as a efficient way to check for r12, r20, r28 in the assert, and for r13, r21, r29 in the if statement.  I originally was comparing against each new APX register encoding.  The style in the PR is concise but it can be done either way.  What do you think?

Got it - it is for few registers check now. What is common between rsp, r12, r20, r28 registers (except encoding)?
R12 is used for heap base in compressed oops  and RSP is RSP. What are r20 and r28? Why they can't be used in this addressing mode?

Please add comments for all lines where you replaced checks for `r*->encoding()` to say for which registers you do a check and why.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1567916701