RFR: 8328998: Encoding support for Intel APX extended general-purpose registers [v4]

[Sandhya Viswanathan]

On Fri, 26 Apr 2024 19:29:04 GMT, Steve Dohrmann <duke at openjdk.org> wrote:

>> src/hotspot/cpu/x86/assembler_x86.cpp line 3620:
>> 
>>> 3618:   InstructionAttr attributes(AVX_128bit, /* rex_w */ true, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ false);
>>> 3619:   // swap src/dst to get correct prefix
>>> 3620:   int encode = simd_prefix_and_encode(src, xnoreg, as_XMMRegister(dst->encoding()), VEX_SIMD_66, VEX_OPCODE_0F, &attributes, true);
>> 
>> Here the last argument to simd_prefix_and_encode shouldn't be true as src is not gpr?
>
> Because of the swap of src and dst args in this case, I think src is actually a gpr here.

Yes, you are correct. Thanks for the clarification.

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PR Review Comment: https://git.openjdk.org/jdk/pull/18476#discussion_r1581494567