RFR: 8310844: [AArch64] C1 compilation fails because monitor offset in OSR buffer is too large for immediate [v2]

[Andrew Dinn]

On Thu, 4 Jan 2024 14:17:25 GMT, Tobias Hartmann <thartmann at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp line 289:
>> 
>>> 287:       __ ldr(r19, Address(OSR_buf, slot_offset + 1*BytesPerWord));
>>> 288:       __ str(r19, frame_map()->address_for_monitor_object(i));
>>> 289:     }
>> 
>> The macro assembler automagically fuses `ldr` pairs. It'd be better to fix this with:
>> 
>> 
>> --- a/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp
>> +++ b/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp
>> @@ -282,7 +282,8 @@ void LIR_Assembler::osr_entry() {
>>          __ bind(L);
>>        }
>>  #endif
>> -      __ ldp(r19, r20, Address(OSR_buf, slot_offset));
>> +      __ ldr(r19, Address(OSR_buf, slot_offset));
>> +      __ ldr(r20, Address(OSR_buf, slot_offset + BytesPerWord));
>>        __ str(r19, frame_map()->address_for_monitor_lock(i));
>>        __ str(r20, frame_map()->address_for_monitor_object(i));
>>      }
>
> Thanks for the review. I adjusted the fix accordingly.

I'm not sure why the recommended adjustment is needed. The macro assembler does fuse pairs of adjacent ldr instructions into an ldp but only when the sizes match and the offsets fit into the requisite number of bits.

So, if the two ldr instrctions ar egenerated next to each other the macroasembler should only convert to ldp *where appropriate*. Am I missing something here?

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/17266#discussion_r1441959403