RFR: 8334554: RISC-V: verify & fix perf of string comparison [v3]
Hamlin Li
mli at openjdk.org
Thu Jul 4 17:21:23 UTC 2024
On Tue, 2 Jul 2024 13:54:18 GMT, Hamlin Li <mli at openjdk.org> wrote:
>> Generally speaking, it would be great for C2 to be more register-group-aware. So if we specify `vReg_V2m2` it includes both `v2` and `v3` for example, and marking a `vReg_V2m2` as TEMP marks both `v2` and `v3` as TEMP implicitly.
>>
>> We already have the concept of `operand` ([`vRef_V2`](https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/riscv/riscv.ad#L3439-L3447) for example), but that expresses a `vRef_V2` is any of the register in the list `[v2_reg]` (aka `v2_reg` only). I don't know that there is a concept for a `vRef_V2m2` being a group of register (aka all register in `[v2_reg, v3_reg]`).
>
> I can do further investigation on it, I kindly like what @luhenry suggested above, if we can implement it.
> But anyway I think it will be in another pr.
Here https://github.com/openjdk/jdk/pull/20040 is the prototype version, just want to get some feedback about the interface & design, i.e. what it looks like, rather than a normal review (Of course, if you have any concerns about its implementation, also welcome to point it out in advance.).
If we are happy with this interface, I will investigate further and implement it.
BTW, currently this prototype only compiles successfully, can not run yet.
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PR Review Comment: https://git.openjdk.org/jdk/pull/19825#discussion_r1665937145
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