RFR: 8334706: [JVMCI] APX registers incorrectly exposed on AMD64

[Jatin Bhateja]

On Fri, 21 Jun 2024 10:01:06 GMT, Doug Simon <dnsimon at openjdk.org> wrote:

> This PR fixes a bug introduced by [JDK-8329032](https://bugs.openjdk.org/browse/JDK-8329032) which added the APX registers to `AMD64.java`.
> It broke [this invariant](https://github.com/openjdk/jdk/blob/d2bebffb1fd26fae4526afd33a818ee776b7102e/src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/code/Architecture.java#L48-L52):
> 
>     /**
>      * List of all available registers on this architecture. The index of each register in this list
>      * is equal to its {@linkplain Register#number number}.
>      */
>     private final RegisterArray registers;
> 
> That invariant is relied upon by the Graal register allocator.
> This PR now tests the invariant and fixes the definitions in `AMD64.java` that were violating it.
> 
> This fix was developed by @tkrodriguez.

src/jdk.internal.vm.ci/share/classes/jdk/vm/ci/amd64/AMD64.java line 88:

> 86:     public static final Register[] cpuRegisters = {
> 87:         rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
> 88:         r8, r9, r10, r11, r12, r13, r14, r15

Hi @dougxc , A comment over cpuRegisters definition relating to its usage will be helpful.

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PR Review Comment: https://git.openjdk.org/jdk/pull/19824#discussion_r1648877417