RFR: 8325991: Accelerate Poly1305 on x86_64 using AVX2 instructions [v10]

[Sandhya Viswanathan]

On Fri, 1 Mar 2024 06:09:30 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:

>> Srinivas Vamsi Parasa has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Update description of Poly1305 algo
>
> src/hotspot/cpu/x86/assembler_x86.cpp line 9115:
> 
>> 9113: 
>> 9114: void Assembler::vpunpcklqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
>> 9115:   assert(UseAVX > 0, "requires some form of AVX");
> 
> Add appropriate AVX512VL assertion

The VL assertion is already being done as part of vex_prefix_and_encode()  and vex_prefix() so no need to add it here. 
That's why we don't have this assertion in any of the AVX instructions which are promotable to EVEX e.g. vpadd, vpsub, etc.

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PR Review Comment: https://git.openjdk.org/jdk/pull/17881#discussion_r1511747533