RFR: 8326385: [aarch64] C2: lightweight locking nodes kill the box register without specifying this effect

Mon Mar 11 16:32:17 UTC 2024

On Mon, 11 Mar 2024 14:01:42 GMT, Roman Kennke <rkennke at openjdk.org> wrote:

> Also, what about the other arches?

RISC-V and x64/x86 both binds the box to a specific register so it can be (and is) specified as `USE_KILL`.

PPC64 (and aarch64 after this pr) uses an extra register allocation, and does not kill the box.

> Do we need to specify the box register at all, if we never use it?

I believe that would require rewriting large parts of the C2 FastLockNode. It is modelled as a CmpNode.

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PR Comment: https://git.openjdk.org/jdk/pull/18183#issuecomment-1988596188