RFR: 8339507: Test generation tool and gtest for testing APX encoding of extended gpr instructions [v4]
hanklo6
duke at openjdk.org
Fri Oct 18 21:23:02 UTC 2024
On Thu, 17 Oct 2024 10:15:36 GMT, Jatin Bhateja <jbhateja at openjdk.org> wrote:
>> hanklo6 has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains 16 additional commits since the last revision:
>>
>> - Merge branch 'master' of https://git.openjdk.java.net/jdk into apx-test-tool
>> - Add comment and defined
>> - Add copyright header
>> - Remove tab
>> - Remove whitespace
>> - Replace whitespace with tab
>> - Add flag before testing
>> - Fix assertion error on MacOS
>> - Add _LP64 flag
>> - Add missing header
>> - ... and 6 more: https://git.openjdk.org/jdk/compare/890d6691...ca48f240
>
> test/hotspot/gtest/x86/asmtest.out.h line 1:
>
>> 1: // BEGIN Generated code -- do not edit
>
> All the memory operand instructions being validated are checking for only one kind of memory addressing mode which is
> `- BASE + INDEX`
> We should also check for following flavors for at least some instructions :-
>
> - BASE
> - INDEX * SCALE + DISPLACEMENT
> - BASE + INDEX + DISPLACEMENT
> - BASE + INDEX * SCALE + DISPLACEMENT
>
>
> Where BASE and INDEX are EGPRs.
Done. I randomly generated different scales and displacements for an instruction. Please let me know if we need to test all possible scales for an instruction.
> test/hotspot/gtest/x86/asmtest.out.h line 1:
>
>> 1: // BEGIN Generated code -- do not edit
>
> Can you also emit the instruction IDs in the comments against each row in insns_strs and insns_lens tables, it
> e.g.
>
>
> // Generated by x86-asmtest.py
> __ shldl(rcx, rdx); // {load}shld ecx, edx IID0
> __ shldl(rdx, rbx); // {load}shld edx, ebx IID1
> ......
> .....
> static const uint8_t insns[] =
> {
> 0x0f, 0xa5, 0xd1, // IID0
> 0x0f, 0xa5, 0xda, // IID1
> ...
> static const unsigned int insns_lens[] =
> {
> 3, // IID0
> 3, // IID1
> #ifdef _LP64
> ......
> static const char* insns_strs[] =
> {
> "__ shldl(rcx, rdx);", // IID0
> "__ shldl(rdx, rbx);", // IID1
> #ifdef _LP64
>
> It will ease correlating and manually inspecting these statically emitted tables.
Thanks, done.
-------------
PR Review Comment: https://git.openjdk.org/jdk/pull/20857#discussion_r1807025312
PR Review Comment: https://git.openjdk.org/jdk/pull/20857#discussion_r1807025446
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