RFR: 8365732: RISC-V: implement AES CTR intrinsics [v3]

[Fei Yang]

On Mon, 25 Aug 2025 03:51:07 GMT, Anjian Wen <wenanjian at openjdk.org> wrote:

>> Hi everyone, please help review this patch which Implement the _counterMode_AESCrypt with Zvkned. On my QEMU, with Zvkned extension enabled, the tests in test/hotspot/jtreg/compiler/codegen/aes/ Passed.
>
> Anjian Wen has updated the pull request incrementally with one additional commit since the last revision:
> 
>   change some name and format

Hi, Thanks for making these changes. I am having a look and I have some minor comments along the way.

src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 2613:

> 2611:     uint64_t maskIndex = 0xaaul;
> 2612:     __ mv(t0, maskIndex);
> 2613:     __ vsetvli(x1, x0, Assembler::e8, Assembler::m1);

Please note that `x1` is a special register (return address) on riscv64. Why not use `t0` instead? I mean:

    __ vsetvli(t0, x0, Assembler::e8, Assembler::m1);
    __ mv(t0, maskIndex);
    __ vmv_v_x(v0, t0);

src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 2644:

> 2642: 
> 2643:     __ bind(L_encrypt_next);
> 2644:     __ add(t1, saved_encrypted_ctr, used);

Can we avoid use `t1` here since we already have `vl` as its alias?
We can declare a `tmp` register and let it alias `c_rarg7`. Like `const Register tmp = c_rarg7;`
Then we can use this `tmp` here instead.

src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 2646:

> 2644:     __ add(t1, saved_encrypted_ctr, used);
> 2645:     __ lb(t0, Address(t1));
> 2646:     __ lb(t1, Address(in));

Should we use `lbu` instead of `lb` here?

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PR Review: https://git.openjdk.org/jdk/pull/25281#pullrequestreview-3162849934
PR Review Comment: https://git.openjdk.org/jdk/pull/25281#discussion_r2305980122
PR Review Comment: https://git.openjdk.org/jdk/pull/25281#discussion_r2305990112
PR Review Comment: https://git.openjdk.org/jdk/pull/25281#discussion_r2305989673