RFR: 8355585: Aarch64: Add aarch64 backend for Float16 vector operations

[Xiaohong Gong]

On Mon, 12 May 2025 07:47:35 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/assembler_aarch64.hpp line 2749:
>> 
>>> 2747:   void adv_simd_three_same(Instruction_aarch64 &current_insn, FloatRegister Vd,
>>> 2748:                            SIMD_Arrangement T, FloatRegister Vn, FloatRegister Vm,
>>> 2749:                            int op1, int op2, int op3);
>> 
>> May I ask why you move this to the .cpp file?
>
> It's not a bad thing to do. Once the function gets so large, especially when it is inlined many times, that's a wise thing to do.

Make sense to me. Thanks for your explanation @theRealAph !

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PR Review Comment: https://git.openjdk.org/jdk/pull/25096#discussion_r2084044297