RFR: 8366076: arm32: Fix register allocation for vector instructions

[Dean Long]

On Wed, 3 Sep 2025 12:55:40 GMT, Max Verevkin <duke at openjdk.org> wrote:

> Arm32 has 32 double-precision floating point registers, the first 16 of which coincide with the 32 single-precision floating point registers. Some vector-operation nodes were implemented in terms of scalar instructions, which only really works for the first 16 doubles. This commit addresses that.

src/hotspot/cpu/arm/arm_32.ad line 330:

> 328:                       R_S16,R_S17,R_S18,R_S19, R_S20,R_S21,R_S22,R_S23,
> 329:                       R_S24,R_S25,R_S26,R_S27, R_S28,R_S29,R_S30,R_S31);
> 330: 

Isn't this the same as dflt_low_reg?

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PR Review Comment: https://git.openjdk.org/jdk/pull/27071#discussion_r2525562386