RFR: 8370473: C2: Better Aligment of Vector Spill Slots [v2]

[Fei Yang]

On Fri, 7 Nov 2025 16:29:25 GMT, Richard Reingruber <rrich at openjdk.org> wrote:

>> With this change c2 will allocate spill slots for vectors with sp offsets aligned to the size of the vectors. Maximum alignment is StackAlignmentInBytes.
>> 
>> It also updates comments that have never been changed to describe how register allocation works for sizes larger than 64 bit.
>> 
>> The change helps to produce better spill code on AARCH64 and PPC64 where an additional add instruction is emitted if the offset of a vector un-/spill is not aligned.
>> 
>> The change is rather a cleanup than an optimization. In most cases the sp offsets will already be properly aligned.
>> Only with incoming stack arguments unaligned offsets can be generated. But also then alignment padding is only added if vector registers larger than 64 bit are used.
>> 
>> So the costs are effectively zero. Especially because extra padding won't enlarge the frame since only virtual registers are allocated which are mapped to the caller frame (see `pad0` in the [diagram](https://github.com/openjdk/jdk/blob/92e380c59c2498b1bc94e26658b07b383deae59a/src/hotspot/cpu/aarch64/aarch64.ad#L3829))
>> 
>> There's a risk though that with the extra virtual registers allocated for `pad0` the limit of registers a `RegMask` can represent is reached (occurs with excessive spilling). If this happens the compilation would fail. It could be retried with smaller alignment for vector spilling though. I havn't implemented it as I thought the risk is negligible.
>> 
>> Note that the sp offset of the accesses should be aligned rather than the effective address. So it could even be argued that the maximum alignment could be higher than StackAlignmentInBytes.
>> 
>> ##### Testing with fastdebug builds on AARCH64 and PPC64:
>> 
>> hotspot_vector_1
>> hotspot_vector_2
>> jdk_vector
>> jdk_vector_sanity
>> 
>> ##### The change passed our CI testing:
>> Tier 1-4 of hotspot and jdk. All of langtools and jaxp. Renaissance Suite and SAP specific tests.
>> Testing was done on the main platforms and also on Linux/PPC64le and AIX.
>> 
>> C2 compilation of `jdk.internal.vm.vector.VectorSupport::rearrangeOp` has unaligned spill offsets. It is covered by the following tests:
>> 
>> compiler/vectorapi/VectorRearrangeTest.java
>> jdk/incubator/vector/Byte128VectorLoadStoreTests.java
>> jdk/incubator/vector/Double256VectorLoadStoreTests.java
>> jdk/incubator/vector/Float128VectorTests.java
>> jdk/incubator/vector/Long256VectorLoadStoreTests.java
>> jdk/incubator/vector/Short128VectorLoadStoreTests.java
>> jdk/incubator/vector/Vector64ConversionTests.java
>
> Richard Reingruber has updated the pull request incrementally with two additional commits since the last revision:
> 
>  - Enhance comment
>  - Fix OptoAssembly for Power 8

test/hotspot/jtreg/compiler/vectorapi/TestVectorSpilling.java line 79:

> 77:     @Test
> 78:     @IR(counts = {IRNode.MEM_TO_REG_SPILL_COPY_TYPE, "vectorx", "> 0"},
> 79:         phase = {CompilePhase.FINAL_CODE})

Hi, I find this IR test is failing on riscv where we are spilling a `vectora`. Maybe we should exclude this case?


diff --git a/test/hotspot/jtreg/compiler/vectorapi/TestVectorSpilling.java b/test/hotspot/jtreg/compiler/vectorapi/TestVectorSpilling.java
index 5e8b9341d8e..9d9a85e174c 100644
--- a/test/hotspot/jtreg/compiler/vectorapi/TestVectorSpilling.java
+++ b/test/hotspot/jtreg/compiler/vectorapi/TestVectorSpilling.java
@@ -76,7 +76,8 @@ static void test16ByteSpilling_runner() {

     @Test
     @IR(counts = {IRNode.MEM_TO_REG_SPILL_COPY_TYPE, "vectorx", "> 0"},
-        phase = {CompilePhase.FINAL_CODE})
+        phase = {CompilePhase.FINAL_CODE},
+        applyIfCPUFeature= {"rvv", "false"})
     static long test16ByteSpilling(long l1, long l2, long l3, long l4, long l5, long l6, long l7, long l8,
                                    long l9 /* odd stack arg */) {
         // To be scalar replaced and spilled to stack

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/27969#discussion_r2532551373