RFR: 8360654: AArch64: Remove redundant dmb from C1 compareAndSet [v5]

Ruben duke at openjdk.org
Wed Nov 19 12:59:47 UTC 2025


On Wed, 12 Nov 2025 14:06:56 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> Samuel Chee has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains six additional commits since the last revision:
>> 
>>  - Address review comments. Refine.
>>  - Merge from the main branch
>>  - Add cmpxchg_barrier helper
>>    
>>    Change-Id: I17acf999140f0c1decb256de8291361c568a4ff8
>>  - Add comment
>>    
>>    Signed-off-by: Samuel Chee <samche01 at arm.com>
>>    Change-Id: I9793ed6ffdff6c044552d069af23620d178f2284
>>  - Add back in dmb membar for non-LSE
>>    
>>    Change-Id: Ie64565420a1758d3191eaebed82c80584ce54ef6
>>  - 8360654: AArch64: Remove redundant dmb from C1 compareAndSet
>>    
>>    Change-Id: I79a0079fc2d3d90eeb671b6ed73d963968d4fa53
>
> src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 3471:
> 
>> 3469:                              bool weak,
>> 3470:                              Register result) {
>> 3471:   cmpxchg(addr, expected, new_val, size, acquire, release, weak, result, false);
> 
> Suggestion:
> 
>   cmpxchg(addr, expected, new_val, size, acquire, release, weak, result, /*with_barrier*/false);
> 
> Reason: avoid naked booleans at call sites.
> Please do this everywhere.

Thank you @theRealAph. Updated, including in `ATOMIC_OP`/`ATOMIC_XCHG` - is that advisable?

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/26000#discussion_r2541888020


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