RFR: 8365732: RISC-V: implement AES CTR intrinsics [v11]

[Anjian Wen]

On Sat, 18 Oct 2025 11:31:37 GMT, Anjian Wen <wenanjian at openjdk.org> wrote:

>> Hi everyone, please help review this patch which Implement the _counterMode_AESCrypt with Zvkned. On my QEMU, with Zvkned extension enabled, the tests in test/hotspot/jtreg/compiler/codegen/aes/ Passed.
>
> Anjian Wen has updated the pull request with a new target base due to a merge or a rebase. The pull request now contains 12 commits:
> 
>  - Merge branch 'openjdk:master' into aes_ctr
>  - add assertion and change test
>  - add zbb and zvbb check
>  - Merge branch 'openjdk:master' into aes_ctr
>  - Merge branch 'openjdk:master' into aes_ctr
>  - fix the counter increase at limit and add test
>  - change format
>  - update reg use and instruction
>  - change some name and format
>  - delete useless Label, change L_judge_used to L_slow_loop
>  - ... and 2 more: https://git.openjdk.org/jdk/compare/eff6439e...716825a4

@theRealAph @RealFYang  I still can not find any suitable way for RVV to increase more than one counter and keep the increase time same. So I change to increase one counter each time and extract a separate function to perform counter increase to ensure that the time for each increment is equal refer to the aarch64 implementation; additionally, I have added some comments and Pseudocode

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PR Comment: https://git.openjdk.org/jdk/pull/25281#issuecomment-3459489205