RFR: JDK-8271567: AArch64: AES Galois CounterMode (GCM) interleaved implementation using vector instructions [v8]

[Andrew Haley]

On Tue, 14 Sep 2021 14:34:09 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/macroAssembler_aarch64_aes.cpp line 604:
>> 
>>> 602:   // v4: high part of product
>>> 603:   // v5: low part ...
>>> 604:   //
>> 
>> I'm not clear about this comment. The ghash generators have a stride of 7. Should this not mean the registers are replicated across v0 - v27 with v6, v13, v20 and v27 classified as unused registers.
>
> Well spotted.

> I suspect it would be hard to produce hand-crafted code that does significantly better when it comes to performance.

Probably not, especially because the design of `KenelGenerator` allows you to do pretty much anything. (In particular, the clones don't even have to compute the same function!) I hope we'd prefer maintainability to shaving off every clock cycle once we'd made encryption no longer the bottleneck.

-------------

PR: https://git.openjdk.java.net/jdk/pull/5390