RFR: JDK-8290137: riscv: small refactoring for add_memory_int32/64

[Fei Yang]

Currently, add_memory_int32/64 for riscv can only add a sign-extended 12-bit immediate to memory since they call addi/addiw assembler direcly. This constraint could be relaxed when the given memory address is in the expected form: base register plus a sign-extended 12-bit offset. In this case, we can emit code for load + add/sub + store sequence adding arbitrary immediate to memory with no more than two scratch registers (t0 and t1) available.

We could also refactor these two functions into four seperate functions: increment, incrementw, decrement and decrementw, so that it will be more clear in code logic at the call sites.

Test: hotspot-tier1 & jdk-tier1 with QEMU.

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Commit messages:
 - JDK-8290137: riscv: small refactoring for add_memory_int32/64

Changes: https://git.openjdk.org/jdk/pull/9461/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=9461&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8290137
  Stats: 87 lines in 8 files changed: 40 ins; 0 del; 47 mod
  Patch: https://git.openjdk.org/jdk/pull/9461.diff
  Fetch: git fetch https://git.openjdk.org/jdk pull/9461/head:pull/9461

PR: https://git.openjdk.org/jdk/pull/9461