RFR: 8296435: RISC-V: Small refactoring for increment/decrement

[Feilong Jiang]

On Mon, 7 Nov 2022 01:45:36 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> The `increment` and `decrement` use t1 as tmp register, while t1 was the flag register in c2.
>> We can make tmp registers as the arguments of `increment` and `decrement` so that c2 can reuse them.
>> 
>> Testing:
>> 
>> full tier1 tests passed on  Linux-riscv64 HiFive Unmathced board with release build
>
> Looks good. Thanks.

@RealFYang  -- Thanks!

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PR: https://git.openjdk.org/jdk/pull/11005