Integrated: 8296435: RISC-V: Small refactoring for increment/decrement

[Feilong Jiang]

On Sun, 6 Nov 2022 01:42:50 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> The `increment` and `decrement` use t1 as tmp register, while t1 was the flag register in c2.
> We can make tmp registers as the arguments of `increment` and `decrement` so that c2 can reuse them.
> 
> Testing:
> 
> full tier1 tests passed on  Linux-riscv64 HiFive Unmathced board with release build

This pull request has now been integrated.

Changeset: 4c80dff2
Author:    Feilong Jiang <fjiang at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/jdk/commit/4c80dff2cab8bc0fcfeca8d21754a28e31e92325
Stats:     42 lines in 3 files changed: 0 ins; 6 del; 36 mod

8296435: RISC-V: Small refactoring for increment/decrement

Reviewed-by: fyang

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PR: https://git.openjdk.org/jdk/pull/11005