RFR: 8295270: RISC-V: Clean up and refactoring for assembler functions [v4]

[Aleksey Shipilev]

On Fri, 14 Oct 2022 01:44:14 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Witnessed that some high-level assember functions are placed in file assembler_riscv.hpp/cpp,
>> such as 'movptr', 'li' and so on. These are macro-assembler functions which should be placed
>> in macroAssembler_riscv.hpp/cpp. Meanwhile, we should also move load & store memory and
>> control assembler functions from address of type 'address' / 'Address'.
>> 
>> Testing: Tier1 on HiFive Unmatched board {fastdebug, release}.
>
> Fei Yang has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Fix code comments

Looks okay from a brief look.

src/hotspot/cpu/riscv/assembler_riscv.hpp line 2417:

> 2415: bool do_compress() const {
> 2416:   return UseRVC && in_compressible_region();
> 2417: }

Indenting had been lost.

src/hotspot/cpu/riscv/macroAssembler_riscv.hpp line 480:

> 478:   void bge(Register Rs1, Register Rs2, Label &L, bool is_far = false);
> 479:   void bltu(Register Rs1, Register Rs2, Label &L, bool is_far = false);
> 480:   void bgeu(Register Rs1, Register Rs2, Label &L, bool is_far = false);

Do you want to line things like these up? For example:



  void beq (Register Rs1, Register Rs2, Label &L, bool is_far = false);
  void bne (Register Rs1, Register Rs2, Label &L, bool is_far = false);
  void blt (Register Rs1, Register Rs2, Label &L, bool is_far = false);
  void bge (Register Rs1, Register Rs2, Label &L, bool is_far = false);
  void bltu(Register Rs1, Register Rs2, Label &L, bool is_far = false);
  void bgeu(Register Rs1, Register Rs2, Label &L, bool is_far = false);

-------------

Marked as reviewed by shade (Reviewer).

PR: https://git.openjdk.org/jdk/pull/10697