RFR: 8295282: Use Zicboz/cbo.zero to zero-out memory on RISC-V [v6]

[Yadong Wang]

On Wed, 19 Oct 2022 10:28:20 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

>> Similarly to AArch64 DC.ZVA, the RISC-V Zicboz [1] extension provides the cbo.zero [2] instruction that allows to zero out memory a cache-line at a time. This should be faster than storing zeroes 64bits at a time.
>> 
>> [1] https://github.com/riscv/riscv-CMOs
>> [2] https://github.com/riscv/riscv-CMOs/blob/master/cmobase/Zicboz.adoc#insns-cbo_zero
>
> Ludovic Henry has updated the pull request incrementally with two additional commits since the last revision:
> 
>  - Explicit use of temp registers
>  - fixup! Add -XX:CacheLineSize= to set cache line size

lgtm

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Marked as reviewed by yadongwang (Author).

PR: https://git.openjdk.org/jdk/pull/10718