RFR: 8295282: Use Zicboz/cbo.zero to zero-out memory on RISC-V [v6]

[Vladimir Kempik]

On Fri, 21 Oct 2022 08:17:32 GMT, Ludovic Henry <luhenry at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/vm_version_riscv.cpp line 48:
>> 
>>> 46: 
>>> 47:   if (!FLAG_IS_DEFAULT(CacheLineSize) && !is_power_of_2(CacheLineSize)) {
>>> 48:     warning("CacheLineSize must be a power of 2");
>> 
>> TBH, I am worried about the case when user specified some inaccurate cache-line size here, especially when the specified value is bigger than the actual cache-line size. The currently implementation won't work in that case. We really need some way to determine the cache-line size at runtime to be safe.
>
> That was done to answer https://github.com/openjdk/jdk/pull/10718#discussion_r996410678. Ideally it would be detected at runtime. However, I don't know of any API in RISC-V or Linux to get that information.

This could be an answer to the issue - https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc#rva22-profiles 
Zic64b Cache blocks must be 64 bytes in size, naturally aligned in the address space.

The following mandatory feature was further restricted in RVA22U64:

Note | While the general RISC-V specifications are agnostic to cache block size, selecting a common cache block size simplifies the specification and use of the following cache-block extensions within the application processor profile. Software does not have to query a discovery mechanism and/or provide dynamic dispatch to the appropriate code. We choose 64 bytes at it is effectively an industry standard. Implementations may use longer cache blocks to reduce tag cost provided they use 64-byte sub-blocks to remain compatible. Implementations may use shorter cache blocks provided they sequence cache operations across the multiple cache blocks comprising a 64-byte block to remain compatible.

We can already create a flag: e.g. -XX:+UseRVA22U64BASE which will activate Zba, Zbb, Zicbom and set cache block size to 64-bytes

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PR: https://git.openjdk.org/jdk/pull/10718