RFR: 8291550: RISC-V: jdk uses misaligned memory access when AvoidUnalignedAccess enabled [v3]

[Vladimir Kempik]

On Fri, 28 Apr 2023 03:53:29 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Vladimir Kempik has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   spaces
>
> src/hotspot/cpu/riscv/assembler_riscv.hpp line 1955:
> 
>> 1953:     target &= ~mask;
>> 1954:     target |= val;
>> 1955:     sd_c_instr(a, target);
> 
> Compressed instructions are supposed to be located at some addresses at least 2-bytes aligned. So I am thinking that there shouldn't be any unaligned access happening here.

on one hand - you are right, on another one - this way it looks more unified with 4-byte opcodes loads/stores

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PR Review Comment: https://git.openjdk.org/jdk/pull/13645#discussion_r1180156370