RFR: 8291550: RISC-V: jdk uses misaligned memory access when AvoidUnalignedAccess enabled [v3]

[Fei Yang]

On Fri, 28 Apr 2023 09:18:04 GMT, Vladimir Kempik <vkempik at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/assembler_riscv.hpp line 1955:
>> 
>>> 1953:     target &= ~mask;
>>> 1954:     target |= val;
>>> 1955:     sd_c_instr(a, target);
>> 
>> Compressed instructions are supposed to be located at some addresses at least 2-bytes aligned. So I am thinking that there shouldn't be any unaligned access happening here.
>
> on one hand - you are right, on another one - this way it looks more unified with 4-byte opcodes loads/stores

The cost is a runtime check of actual alignment if you go this way. But this should not be the hot path, so I am OK to both ways.

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PR Review Comment: https://git.openjdk.org/jdk/pull/13645#discussion_r1181050598