RFR: 8312569: RISC-V: Missing intrinsics for Math.ceil, floor, rint [v2]

[Ilya Gavrilin]

On Thu, 17 Aug 2023 06:49:26 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> Ilya Gavrilin has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Change fsgnj_d(dst, src, src) to fmv_d(dst, src)
>
> src/hotspot/cpu/riscv/riscv.ad line 7706:
> 
>> 7704:   match(Set dst (RoundDoubleMode src rmode));
>> 7705:   ins_cost(2 * XFER_COST + BRANCH_COST);
>> 7706:   effect(TEMP_DEF dst, TEMP tmp1, TEMP tmp2, TEMP tmp3, KILL cr);
> 
> Do we kill `cr` anywhere in the assembly code?

According to documentation we have situations when convert instruction can set an error flag in the status register:
> All floating-point conversion instructions set the Inexact exception flag if the rounded result differs from the operand value and the Invalid exception flag is not set. [1] 

[1] https://five-embeddev.com/riscv-isa-manual/latest/f.html#single-precision-floating-point-conversion-and-move-instructions

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PR Review Comment: https://git.openjdk.org/jdk/pull/14991#discussion_r1298430830