RFR: 8319716: RISC-V: Add SHA-2 [v4]

[Fei Yang]

On Fri, 15 Dec 2023 14:06:04 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

> Correct me if I'm wrong?
> 
> (and if there is no call CR must be kept alive, which is a bit scary, e.g. must spill t1 to make sure we don't kill CR)

I haven't checked how the stub are invoked. But I just took a look at aarch64's version of `generate_sha256_implCompress`. Here is what I see. The `ofs` register alias `c_rarg2` and is updated at [1], but it is not saved & restored. Another case is the CR flag register, it is clobberd by the compare at [2], but still not saved & restored. So do the caller-save vector registers used in this stub. 

[1] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp#L3798
[2] https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/aarch64/stubGenerator_aarch64.cpp#L3799

> (I don't see what you mean by vector are saved?, only t2 is push to stack ?)

I mean shouldn't we and other platforms like aarch64 also save & restore those caller-save vector registers if it is necessary? Why just `t2`?

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PR Comment: https://git.openjdk.org/jdk/pull/16562#issuecomment-1858000854