RFR: 8308076: X86_64: make rheapbase register allocatable in zero based compressedOops mode [v3]

Quan Anh Mai qamai at openjdk.org
Mon May 15 12:52:48 UTC 2023


On Mon, 15 May 2023 09:13:57 GMT, kuaiwei <duke at openjdk.org> wrote:

>> In x86 64 mode, decode heap oop could use SIB without base if heap base is zero. like
>> 
>> 0d1     movl    R11, [,R9 << 3 + #72] (zero base compressed oop addressing) # compressed ptr ! Field: java/lang/ClassLoader.classAssertionStatus 
>> 
>> So rheapbase( r12 )  can be allocated as general register.
>> 
>> Tier 1/2 tests are passed without new failure.
>
> kuaiwei has updated the pull request incrementally with one additional commit since the last revision:
> 
>   fix zero build

Thanks for your explanations, my proposal can alleviate the usage of immediate 0 but will not solve the increased code size from base-less addresses. I have left some small comments.

Also, there is a `reinit_heapbase` in `MacroAssembler` that you may consider modifying as well.

src/hotspot/cpu/x86/x86_64.ad line 639:

> 637:   assert(disp_reloc == relocInfo::none, "cannot have disp");
> 638:   MacroAssembler masm(&cbuf);
> 639:   masm.emit_regmem(reg, base, index, (Address::ScaleFactor)scale, disp, RelocationHolder::none);

This change is not really related, right? I think a separate change to cleanup these would be more preferrable

src/hotspot/share/oops/compressedOops.hpp line 101:

> 99:   static address  ptrs_base()                { return _narrow_oop._base; }
> 100: 
> 101: #if defined(X86) && !defined(ZERO)

This should not be leaked into shared code

-------------

PR Review: https://git.openjdk.org/jdk/pull/13976#pullrequestreview-1426467820
PR Review Comment: https://git.openjdk.org/jdk/pull/13976#discussion_r1193782498
PR Review Comment: https://git.openjdk.org/jdk/pull/13976#discussion_r1193777739


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