RFR: 8308076: X86_64: make rheapbase register allocatable in zero based compressedOops mode [v3]

[kuaiwei]

On Mon, 15 May 2023 12:43:20 GMT, Quan Anh Mai <qamai at openjdk.org> wrote:

>> kuaiwei has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   fix zero build
>
> src/hotspot/cpu/x86/x86_64.ad line 639:
> 
>> 637:   assert(disp_reloc == relocInfo::none, "cannot have disp");
>> 638:   MacroAssembler masm(&cbuf);
>> 639:   masm.emit_regmem(reg, base, index, (Address::ScaleFactor)scale, disp, RelocationHolder::none);
> 
> This change is not really related, right? I think a separate change to cleanup these would be more preferrable

The assembler function in adfile can not handle the case SIB without base reg. And emit_operand_helper in assembler_x86.cpp can cover more cases and do more check ,like cpu type check in emit_compressed_disp_byte. So I think it's better to reuse the function in assembler_x86.cpp

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PR Review Comment: https://git.openjdk.org/jdk/pull/13976#discussion_r1193884237