RFR: 8318218: RISC-V: C2 CompressBits

[Fei Yang]

On Fri, 3 Nov 2023 12:17:16 GMT, Hamlin Li <mli at openjdk.org> wrote:

>>> I made a mistake, UseRVVForCompressBitsIntrinsics is only defined in riscv global.hpp. I think I can resolve the issue by defining it in global global.hpp, but seems it's not a good idea either. Any suggestions?
>> 
>> Maybe `bool Matcher::match_rule_supported(int opcode) {` in `riscv.ad` is a good place, and just returning `UseRVV` would be enough for `Op_CompressBits`?:
>> https://github.com/openjdk/jdk/blob/c788160f8acea7b58b54ad857b601bb7ffb53f8e/src/hotspot/cpu/riscv/riscv.ad#L1896-L1897
>
> Thanks @feilongjiang for pointing at the postion.
> 
> @robehn @theRealAph I agree, thanks for discussion

@Hamlin-Li : Thanks for the update. But I am still not satisfied with current approach. The issue is that we will be wasting vector registers when running on hardwares equipped with RVV registers of bigger width, say 256-bits. We are reserving more vector registers than needed in that case, which might mean some extra vector register spilling/reloading under high register pressure. We should consider this issue.

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PR Comment: https://git.openjdk.org/jdk/pull/16481#issuecomment-1805888144