RFR: 8318218: RISC-V: C2 CompressBits

[Feilong Jiang]

On Thu, 2 Nov 2023 16:50:50 GMT, Hamlin Li <mli at openjdk.org> wrote:

> Hi,
> Can you review the change to add intrinsic for CompressBits for Long & Integer?
> Thanks!
> 
> ## Test
> pass jtreg test:
> test/jdk/java/lang/CompressExpand*.java

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 4425:

> 4423: }
> 4424: 
> 4425: void MacroAssembler::compress_bits(Register dst, Register src, Register mask, Register tmp, bool is_long) {

Since `compress_bits` uses RVV instruction, I think we should add `_v` suffix.
Suggestion:

void MacroAssembler::compress_bits_v(Register dst, Register src, Register mask, Register tmp, bool is_long) {

src/hotspot/cpu/riscv/macroAssembler_riscv.hpp line 1403:

> 1401: 
> 1402: public:
> 1403:   // compress bits, i.e. j.l.Long::compress.

All `compress_bits` methods are only used for C2, maybe we could move them into `C2_MacroAssembler`.

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/16481#discussion_r1380960438
PR Review Comment: https://git.openjdk.org/jdk/pull/16481#discussion_r1380960814