RFR: 8318158: RISC-V: implement roundD/roundF intrinsics [v2]

[Vladimir Kempik]

On Sat, 11 Nov 2023 10:06:26 GMT, Andrew Haley <aph at openjdk.org> wrote:

>> I think it may start working if rounding mode for fadd_s would be changed from default rne, to rdn
>
> It won't because of double rounding, and changing rounding modes is expensive. 
> https://github.com/openjdk/jdk/blob/master/src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp#L5882

But doing fadd 0.5 to the number, which can't have fractional part, in rdn mode becomes no-op.
At least on single precision floats it works:
fadd(-8388609.0, +0.5, rdn) results in -8388609.0
and the mode for both fadd and fcvt will be the same, (perf tests showed no difference on thead tho)

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PR Review Comment: https://git.openjdk.org/jdk/pull/16382#discussion_r1390198946