RFR: 8315716: RISC-V: implement ChaCha20 intrinsic

[Hamlin Li]

On Mon, 25 Sep 2023 17:40:23 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 4343:
>> 
>>> 4341:     // in java level.
>>> 4342:     __ li(avl, 16);
>>> 4343:     __ vsetvli(length, avl, Assembler::e32, Assembler::m1, Assembler::ma, Assembler::ta);
>> 
>> Is this really correct.
>> We have no uses of ma/ta before this since we need to make sure we never touch memory outside of the arrays.
>> I don't think ma/ta will ever be correct when working on Java heap.
>> 
>> I would drop the last two argument and use the default of mu/tu as we do everywhere else.
>
> I'm not quite sure, but modified as you suggested.

There is some statement at https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#343-vector-tail-agnostic-and-vector-mask-agnostic-vta-and-vma, 

The agnostic policy was added to accommodate machines with vector register renaming. With an undisturbed policy, all elements would have to be read from the old physical destination vector register to be copied into the new physical destination vector register. This causes an inefficiency when these inactive or tail values are not required for subsequent calculations.

Seems it's more effiecient at some situation, but I'm not sure what's that case mentioned above.

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PR Review Comment: https://git.openjdk.org/jdk/pull/15899#discussion_r1336206026