RFR: 8315716: RISC-V: implement ChaCha20 intrinsic

[Hamlin Li]

On Mon, 25 Sep 2023 17:41:49 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> I'm not quite sure, but modified as you suggested.
>
> There is some statement at https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#343-vector-tail-agnostic-and-vector-mask-agnostic-vta-and-vma, 
> 
> The agnostic policy was added to accommodate machines with vector register renaming. With an undisturbed policy, all elements would have to be read from the old physical destination vector register to be copied into the new physical destination vector register. This causes an inefficiency when these inactive or tail values are not required for subsequent calculations.
> 
> Seems it's more effiecient at some situation, but I'm not sure what's that case mentioned above.

At https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#7-vector-loads-and-stores, there is a statement, ```Vector loads and stores can be masked, and they only access memory or raise exceptions for active elements.```
Seems it will not "touch memory outside of the arrays" when store back to key stream array(which in java heap)

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PR Review Comment: https://git.openjdk.org/jdk/pull/15899#discussion_r1336216191