RFR: 8345322: RISC-V: Add concurrent gtests for cmpxchg variants [v5]
Fei Yang
fyang at openjdk.org
Fri Dec 13 10:09:16 UTC 2024
On Thu, 12 Dec 2024 13:42:29 GMT, Robbin Ehn <rehn at openjdk.org> wrote:
>> Hi, please consider these additional concurrent tests.
>>
>> (this will not go into 24)
>>
>> There are two concurrent counter versions:
>> - Each thread is exclusively responsible for an certain increment steps
>> - Each thread plainly tries to CAS increment by one
>>
>> I refactored the code, so these concurrent versions can reuse the generated CAS functions.
>>
>>
>> [ RUN ] RiscV.cmpxchg_int64_concurrent_lr_sc_vm
>> [ OK ] RiscV.cmpxchg_int64_concurrent_lr_sc_vm (24 ms)
>> [ RUN ] RiscV.cmpxchg_int64_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.cmpxchg_int64_concurrent_maybe_zacas_vm (12 ms)
>> [ RUN ] RiscV.cmpxchg_int32_concurrent_lr_sc_vm
>> [ OK ] RiscV.cmpxchg_int32_concurrent_lr_sc_vm (14 ms)
>> [ RUN ] RiscV.cmpxchg_int32_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.cmpxchg_int32_concurrent_maybe_zacas_vm (14 ms)
>> [ RUN ] RiscV.cmpxchg_int16_concurrent_lr_sc_vm
>> [ OK ] RiscV.cmpxchg_int16_concurrent_lr_sc_vm (15 ms)
>> [ RUN ] RiscV.cmpxchg_int16_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.cmpxchg_int16_concurrent_maybe_zacas_vm (14 ms)
>> [ RUN ] RiscV.cmpxchg_int8_concurrent_lr_sc_vm
>> [ OK ] RiscV.cmpxchg_int8_concurrent_lr_sc_vm (14 ms)
>> [ RUN ] RiscV.cmpxchg_int8_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.cmpxchg_int8_concurrent_maybe_zacas_vm (14 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int64_concurrent_lr_sc_vm
>> [ OK ] RiscV.weak_cmpxchg_int64_concurrent_lr_sc_vm (15 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int64_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.weak_cmpxchg_int64_concurrent_maybe_zacas_vm (11 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int32_concurrent_lr_sc_vm
>> [ OK ] RiscV.weak_cmpxchg_int32_concurrent_lr_sc_vm (15 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int32_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.weak_cmpxchg_int32_concurrent_maybe_zacas_vm (12 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int16_concurrent_lr_sc_vm
>> [ OK ] RiscV.weak_cmpxchg_int16_concurrent_lr_sc_vm (13 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int16_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.weak_cmpxchg_int16_concurrent_maybe_zacas_vm (14 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int8_concurrent_lr_sc_vm
>> [ OK ] RiscV.weak_cmpxchg_int8_concurrent_lr_sc_vm (13 ms)
>> [ RUN ] RiscV.weak_cmpxchg_int8_concurrent_maybe_zacas_vm
>> [ OK ] RiscV.weak_cmpxchg_int8_concurrent_maybe_zacas_vm (15 ms)
>>
>>
>> Execute with +UseZacas, and without on BPI-F3.
>>
>> Thanks, Robbin
>
> Robbin Ehn has updated the pull request with a new target base due to a merge or a rebase. The incremental webrev excludes the unrelated changes brought in by the merge/rebase. The pull request contains eight additional commits since the last revision:
>
> - Merge branch 'master' into 8345322
> - Fixed tests for uint32 and added edges cases
> - Inclusive case
> - Reviews comments, added uint32
> - Code share
> - Overflow
> - Merge branch 'master' into 8345322
> - Concurrent
Still good. It is passing on my P550 SBC.
-------------
Marked as reviewed by fyang (Reviewer).
PR Review: https://git.openjdk.org/jdk/pull/22574#pullrequestreview-2501910950
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