RFR: 8346475: RISC-V: Small improvement for MacroAssembler::ctzc_bit [v2]

[Fei Yang]

On Wed, 18 Dec 2024 14:11:12 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> Fei Yang has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Review comments
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 5408:
> 
>> 5406:     ctz(Rd, Rs);
>> 5407:     andi(tmp1, Rd, step - 1);
>> 5408:     sub(Rd, Rd, tmp1);
> 
> Seems these 2 lines can be replaced with single instruction:
> 
> andi Rd, Rd, -step

Great! I have fixed accordingly and remove the first assertion. Thanks.

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PR Review Comment: https://git.openjdk.org/jdk/pull/22800#discussion_r1890344743