RFR: JDK-8331732 : [PPC64] Unify and optimize code which converts != 0 to 1 [v2]

[Suchismith Roy]

On Wed, 26 Jun 2024 16:55:28 GMT, Amit Kumar <amitkumar at openjdk.org> wrote:

>> Suchismith Roy has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   empty lines
>
> src/hotspot/cpu/ppc/macroAssembler_ppc.cpp line 356:
> 
>> 354:     else
>> 355:       cmpwi(CCR0, dst, 0);
>> 356:     setbcr(dst, CCR0, Assembler::zero);
> 
> This is what I understood after implementation & definition: 
> 
> If bit BI of the CR contains a 1, register RT is set to 0. Otherwise, register RT is set to 1.
> 
> CCR0 will contain `1` when `dst == 0`. then  `dst` will be set to `1` by `setbcr`.

Yes the bit related to value of zero will be set. and setbcr will return  0 , if value is 1 in the CCR0. So the return register will have a value of 0, since it is 0. Similarly for non zero value, setbcr will return 1, and return register will have value of 1, which is the expected behaviour.

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PR Review Comment: https://git.openjdk.org/jdk/pull/19886#discussion_r1656664120