RFR: 8331558: AArch64: optimize integer remainder [v3]

[Jin Guojie]

On Wed, 8 May 2024 03:14:43 GMT, Eric Liu <eliu at openjdk.org> wrote:

>> Jin Guojie has updated the pull request incrementally with one additional commit since the last revision:
>> 
>>   Applicable platforms expanded to the entire neoverse family
>>   
>>   Even on the V series (V1 and V2), both sdiv/udiv and msub instructions are executed in M0 unit (Integer multi cycle). It should benefit the V series as well.
>
> src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp line 465:
> 
>> 463:       /* On Neoverse, MSUB uses the same ALU with SDIV.
>> 464:        * The combination of MUL/SUB can utilize multiple ALUs,
>> 465:        * and is much faster than MSUB. */
> 
> Please refine this comment. I suppose this combination can benefit other situiations which multiple instructions grab the M0, not just for MSUB + SDIV.

Comments refined in 

https://github.com/openjdk/jdk/pull/19093/commits/bb4178931eca35cfac26bbdce04c22bdc8026805

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PR Review Comment: https://git.openjdk.org/jdk/pull/19093#discussion_r1594926362