RFR: 8332265: RISC-V: Materialize pointers faster by using a temp register [v6]

[Robbin Ehn]

On Fri, 24 May 2024 10:48:36 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> Robbin Ehn has updated the pull request incrementally with two additional commits since the last revision:
>> 
>>  - Fixed more comments
>>  - Fixed comments
>
> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 1681:
> 
>> 1679: }
>> 1680: 
>> 1681: void MacroAssembler::movptr1(Register Rd, uint64_t imm64, int32_t &offset) {
> 
> Original code of MacroAssembler:: movptr(...) is bit tricky at `upper -= lower;` to understand for me, and I think new MacroAssembler:: movptr2(...) uses the similar way at `lower30 - low12`.
> I can add some comment later to help future understanding later.

Yes, it's very confusing with 12 bit *signed*, imm 11 bits + 1 signed bit.
Therefore we need to use arithmetic shift to create "12 bit sign value".
(hence why they do not use 12ull, to signal this is an arithmetic shift)

So if we need to set bit 12 this value it will be negative plus the bit pattern we want in the other 11 bits.
To compensate for that we need to lui() a larger value, and that value would be low30 - low12.
If low12 is postive it's just removing those bits, otherwise we also need to add 4096 (bit 12).
Hence low30 - -low12 would instead add to low30, the mid18 can thus be extended to 19 bits.

The 20 bit is sign bit so we must stay away from it otherwise lui() will sign extend the 19+1 imm value.

I don't think that helped, but I tried at least :)

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PR Review Comment: https://git.openjdk.org/jdk/pull/19246#discussion_r1613411682