RFR: 8332265: RISC-V: Materialize pointers faster by using a temp register [v6]

Hamlin Li mli at openjdk.org
Fri May 24 10:58:04 UTC 2024


On Thu, 23 May 2024 10:55:35 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> Hi, please consider!
>> 
>> Materializing a 48-bit pointer, using an additional register, we can do with:
>> lui + lui + slli + add + addi
>> This 15% faster both on VF2 and in CPU models, compared to movptr().
>> 
>> As we often materialize during calls there is free registers.
>> 
>> I have choose just a few spot to use it, many more can use.
>> E.g. la() with tmp register can use li48 instead of movptr.
>> 
>> Running tests now (so far so good), as if I screwed up IC calls it should be seen fast.
>> And benchmarks when hardware is free.
>
> Robbin Ehn has updated the pull request incrementally with two additional commits since the last revision:
> 
>  - Fixed more comments
>  - Fixed comments

And a general question about `nativeInst_riscv.cpp` and `macroAssembler_riscv.cpp`. I saw the functions in these 2 files call each other, that make the code a bit mess to me.  It's not an issue introduced in this pr.
I wonder if this could be refactored? If so, I can work on it. But just in case you have easy answer already, so I don't have to do further investigation.

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PR Comment: https://git.openjdk.org/jdk/pull/19246#issuecomment-2129240699


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