RFR: 8344010: RISC-V: Zacas do not work with LW locking

[Robbin Ehn]

On Wed, 20 Nov 2024 06:24:06 GMT, Robbin Ehn <rehn at openjdk.org> wrote:

>> src/hotspot/cpu/riscv/macroAssembler_riscv.cpp line 3488:
>> 
>>> 3486:     } else {
>>> 3487:       mv(t0, expected);
>>> 3488:       atomic_cas(t0, new_val, addr, size, acquire, release);
>> 
>> Not sure if I understand this correctly.
>> Could it be better to tell if `result` == `new_val`? If false, then we don't need the extra `mv`.
>
> The "mv()" check that for you, so an e.g. mv(a0, a0) will never emit an instruction.
> 
> OT NOTE:
> If you are in an InCompressableRegion this will still not emit an instruction so your offsets may be wrong.

Oh, sorry I now see what you mean.

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/22149#discussion_r1849623426