RFR: 8322770: Implement C2 VectorizedHashCode on AArch64 [v11]

Andrew Haley aph at openjdk.org
Tue Sep 24 10:09:40 UTC 2024


On Mon, 23 Sep 2024 12:22:55 GMT, Mikhail Ablakatov <duke at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/assembler_aarch64.hpp line 2887:
>> 
>>> 2885:       f(0b10, 23, 22), f(index & 1, 21), rf(Vm, 16), f(op2, 15, 12), f(index >> 1, 11);             \
>>> 2886:     }                                                                                               \
>>> 2887:     f(0, 10), rf(Vn, 5), rf(Vd, 0);                                                                 \
>> 
>> Suggestion:
>> 
>> #define INSN(NAME, op1, op2)                                                              \
>>   void NAME(FloatRegister Vd, SIMD_Arrangement T, FloatRegister Vn, FloatRegister Vm, int index) { \
>>     starti;                                                                               \
>>     assert(T == T4H || T == T8H || T == T2S || T == T4S, "invalid arrangement");          \
>>     assert(index >= 0 &&                                                                  \
>>                ((T == T2S && index <= 1) || (T != T2S && index <= 3) || (T == T8H && index <= 7)), \
>>            "invalid index");                                                              \
>>     assert((T != T4H && T != T8H) || Vm->encoding() < 16, "invalid source SIMD&FP register"); \
>>     f(0, 31), f((int)T & 1, 30), f(op1, 29), f(0b01111, 28, 24), f(0b01, 23, 22);         \
>>     if (T == T4H || T == T8H) {                                                           \
>>       f(index & 0b11, 21, 20), lrf(Vm, 16);                                               \
>>     } else {                                                                              \
>>       f(index & 1, 21), rf(Vm, 16);                                                       \
>>     }                                                                                     \
>>     f(op2, 15, 12), f(index >> 1, 11), f(0, 10), rf(Vn, 5), rf(Vd, 0);                    \
>> 
>> I think it's a bit easier to see what's going on here if we lose the duplicated code.
>
> Looks like that's incorrect: the 22th-23th bits and 11th bits differ.

It's untested. What I'm trying to say is that we shouldn't duplicate stuff. Perhaps I should have been clearer.

Separate the fields into what is the same, and what is different. Put the different inside the if. Put the common outside the if.

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/18487#discussion_r1773049080


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