RFR: 8340732: RISC-V: Refactor crc32 scalar version

Hamlin Li mli at openjdk.org
Wed Sep 25 07:50:35 UTC 2024


On Wed, 25 Sep 2024 07:42:58 GMT, Fei Yang <fyang at openjdk.org> wrote:

>> How do you think we add t3-t6 alias into assemler_riscv.hpp?
>> I saw several times people had the similar question, and in the code there are several places like this `Register size      = x29;   // t4`, i.e. try to use t3-t6, but needs to add a comment for that.
>
> Ah, I just realized we only have t0 - t2 defined in file assemler_riscv.hpp. I think its reasonable and helpful to add more ones like t3 - t6. These are temporary registers names / ABI Mnemonics specified by the RISC-V psABI spec.

OK, let me do it in another pr, as there're several other places like `Register size      = x29;   // t4`, I will change them together, and also include this place.
tracked by https://bugs.openjdk.org/browse/JDK-8340880

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PR Review Comment: https://git.openjdk.org/jdk/pull/21150#discussion_r1774717904


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