RFR: 8334999: RISC-V: implement AES single block encryption/decryption intrinsics [v7]

[Fei Yang]

On Sun, 8 Sep 2024 13:24:49 GMT, Arseny Bochkarev <duke at openjdk.org> wrote:

>> Hello everyone! Please review this port of vector AES single block encryption/decryption intrinsics. On my QEMU with `Zvkned` extension enabled the `test/hotspot/jtreg/compiler/codegen/aes/TestAESMain.java` test is OK. I know that currently hardware implementing this extension is not available on the market but I suppose this PR can be a good starting point on supporting AES intrinsics for RISC-V in OpenJDK.
>
> Arseny Bochkarev has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Multiversion decrypt intrinsic

src/hotspot/cpu/riscv/stubGenerator_riscv.cpp line 2373:

> 2371:       __ vxor_vv(res, res, working_vregs[i]);
> 2372:       __ vaesdm_vv(res, vzero);
> 2373:     }

Seems that a lot more `vxor.vv` are emitted here compared with the openssl version [1]. I wonder if this could be further optimized. Or is there anything I missed? Thanks.

[1] https://github.com/openssl/openssl/blob/master/crypto/aes/asm/aes-riscv64-zvkned.pl#L279-L295

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PR Review Comment: https://git.openjdk.org/jdk/pull/19960#discussion_r1775344680