RFR: 8353572: x86: AMD platforms miss the check for CLWB feature flag

[Aleksey Shipilev]

On Tue, 8 Apr 2025 22:23:47 GMT, Vladimir Ivanov <vlivanov at openjdk.org> wrote:

>> Are you happy with this explanation, @iwanowww?
>
> Well, not really. If it were like that, then all CPU sensing logic on x86 would have been vendor-specific. But it's not the case: among many features x86 CPUs may declare, just a few are treated as vendor-specific. 
> 
> I took a look at how it was handled before and many extensions Intel introduced were not guarded by `is_intel()` check in the first place.
> 
> And there's even more to that: though `CPU_LZCNT` and `CPU_3DNOW_PREFETCH` are handled as vendor-specific, both of them are treated uniformly across all 3 cpu families. Can those be moved into vendor-agnostic part now? 
> 
> Overall, I'm more comfortable with moving the check rather than duplicating it in AMD-specific block.

I would agree on moving `CPU_CLWB` check to common block, if we only had Intel and AMD for x86 support. But there is also ZX, and I cannot find any docs for that implementation, so I presume pessimistically that we cannot trust the CPUID bit for `CLWB` is in the same place for that platform.

So in my mind checking `CLWB` for Intel and AMD specifically is safer. As the compromise, we can move `CLWB` to common block, but predicate it with `!is_zx()`, since we don't know about it. I think `CPU_SERIALIZE` would be another flag like this.

I agree that `CPU_LZCNT`, `CPU_3DNOW_PREFETCH` can now be moved to common block.

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PR Review Comment: https://git.openjdk.org/jdk/pull/24385#discussion_r2034932771