RFR: 8365147: AArch64: Replace DMB + LD + DMB with LDAR for C1 volatile field loads

[Samuel Chee]

Replaces the DMB ISH + LD + DMB ISHLD sequence with LDAR for volatile field loads - for example, AtomicLong::get.

This is valid, as originally the DMBs were necessary due to the case described here - https://bugs.openjdk.org/browse/JDK-8179954. As in the rare case where the LD can be reordered with an LDAR or STLR from the C2 implementation for stores and loads, these DMBs are required.
However, acquire/release operations use a sequentially consistent model which does not allow reordering between them. Hence, the LD can be replaced with an LDAR to disallow reordering with a STLR/LDAR and the first DMB can be removed.

The LDAR has acquire semantics, so it's impossible for memory accesses after to be reordered before; the DMB ISHLD is not required. Therefore, a singular LDAR is sufficient.

This excludes floats and doubles, as they do not have equivalent load-acquire instructions.

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Commit messages:
 - 8365147: AArch64: Replace DMB + LD + DMB with LDAR for C1 volatile loads

Changes: https://git.openjdk.org/jdk/pull/26748/files
  Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=26748&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8365147
  Stats: 120 lines in 10 files changed: 96 ins; 0 del; 24 mod
  Patch: https://git.openjdk.org/jdk/pull/26748.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/26748/head:pull/26748

PR: https://git.openjdk.org/jdk/pull/26748