RFR: 8365147: AArch64: Replace DMB + LD + DMB with LDAR for C1 volatile field loads [v2]

[Andrew Haley]

On Tue, 19 Aug 2025 14:38:54 GMT, Samuel Chee <duke at openjdk.org> wrote:

>> src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp line 1410:
>> 
>>> 1408:   // be atomic - which includes unaligned ones - use the generic DMB + LD sequence, as LDAR might
>>> 1409:   // fault for unaligned accesses.
>>> 1410:   if (AlwaysAtomicAccesses) {
>> 
>> I'm not sure this makes sense. Misaligned accesses can't ever be atomic.
>
> Yes, so the experimental flag `AlwaysAtomicAccesses` will attempt to force to make all accesses atomic - even misaligned ones which causes a memory access error if using LDAR. Hence we resort to the old code sequence when this flag is active.

Right, but I don't think we need to do this. I'm asking around to find out.

-------------

PR Review Comment: https://git.openjdk.org/jdk/pull/26748#discussion_r2287427842